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524 lines
21 KiB
524 lines
21 KiB
/**
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******************************************************************************
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* @file py32f0xx_hal_pwr.h
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* @author MCU Application Team
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* @brief Header file of PWR HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by Puya under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __PY32F0xx_HAL_PWR_H
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#define __PY32F0xx_HAL_PWR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "py32f0xx_hal_def.h"
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/** @addtogroup PY32F0xx_HAL_Driver
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* @{
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*/
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/** @defgroup PWR PWR
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* @brief PWR HAL module driver
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup PWR_Exported_Types PWR Exported Types
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* @{
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*/
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#if defined(PWR_PVD_SUPPORT)
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/**
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* @brief PWR PVD configuration structure definition
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*/
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typedef struct
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{
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uint32_t PVDSource; /*!< PVDSource: Specifies the PVD detection source.
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This parameter can be a value of @ref PWR_PVD_Source. */
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uint32_t PVDFilter; /*!< PVDFilter: Specifies the PVD input filter.
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This parameter can be a value of @ref PWR_PVD_Filter. */
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uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
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This parameter can be a value or a combination of
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@ref PWR_PVD_detection_level. */
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uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
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This parameter can be a value of @ref PWR_PVD_Mode. */
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} PWR_PVDTypeDef;
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#endif
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/**
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* @brief PWR Stop configuration structure definition
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*/
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typedef struct
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{
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uint32_t LPVoltSelection; /*!< LPVoltSelection: Set the low power internal regulator output voltage.
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This parameter can be a value of @ref PWR_STOP_LPR_Voltage. */
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uint32_t RegulatorSwitchDelay; /*!< RegulatorSwitchDelay: Set VDD voltage from LP to MR ready time after wake up.
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This parameter can be a value of @ref PWR_STOP_WakeUp_Regulator_Switch_Delay. */
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uint32_t WakeUpHsiEnableTime; /*!< WakeUpHsiEnableTime: Set the flash delay time after wake up.
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This parameter can be a value of @ref PWR_STOP_WakeUp_HSIEN_Timing. */
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uint32_t SramRetentionVolt; /*!< SramRetentionVolt: Set the SRAM retention voltage in stop mode.
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This parameter can be a value of @ref PWR_STOP_mode_Sram_Retention_Voltage. */
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uint32_t FlashDelay; /*!< FlsahDelay: Set the flash delay time after wake up.
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This parameter can be a value of @ref PWR_STOP_WakeUp_Flash_Dealy. */
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} PWR_StopModeConfigTypeDef;
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/**
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* @brief PWR BIAS configuration structure definition
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*/
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typedef struct
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{
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uint32_t BiasCurrentSource; /*!< BiasCurrentSource: Set the bias currents load source.
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This parameter can be a value of @ref PWR_MR_BiasCurrent_Source. */
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uint32_t BiasCurrentValue; /*!< BiasCurrentValue: Set the bias currents config value.
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This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
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} PWR_BIASConfigTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup PWR_Exported_Constants PWR Exported Constants
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* @{
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*/
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#if defined(PWR_PVD_SUPPORT)
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/** @defgroup PWR_PVD_Source PWR PVD Source
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* @{
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*/
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#define PWR_PVD_SOURCE_VCC (0x00000000u) /*!< PVD detection source is Vcc */
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#define PWR_PVD_SOURCE_PB07 (PWR_CR2_SRCSEL) /*!< PVD detection source is PB07 */
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/**
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* @}
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*/
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/** @defgroup PWR_PVD_Filter PWR PVD Filter
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* @{
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*/
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#define PWR_PVD_FILTER_NONE (0x00000000u) /*!< PVD filter disable */
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#define PWR_PVD_FILTER_1CLOCK (PWR_CR2_FLTEN | 0x00000000u) /*!< PVD filter 1 clock */
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#define PWR_PVD_FILTER_2CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_0) /*!< PVD filter 2 clock */
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#define PWR_PVD_FILTER_4CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_1) /*!< PVD filter 4 clock */
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#define PWR_PVD_FILTER_16CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_0 | PWR_CR2_FLT_TIME_1) /*!< PVD filter 16 clock */
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#define PWR_PVD_FILTER_64CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_2) /*!< PVD filter 64 clock */
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#define PWR_PVD_FILTER_128CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_2 | PWR_CR2_FLT_TIME_0) /*!< PVD filter 128 clock */
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#define PWR_PVD_FILTER_1024CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_2 | PWR_CR2_FLT_TIME_1) /*!< PVD filter 1024 clock */
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/**
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* @}
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*/
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/** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels
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* @note see datasheet for selection voltage value
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* @{
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*/
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#define PWR_PVDLEVEL_0 (0x00000000u) /*!< same PVD threshold level 0 on rising & falling */
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#define PWR_PVDLEVEL_1 (PWR_CR2_PVDT_0) /*!< same PVD threshold level 1 on rising & falling */
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#define PWR_PVDLEVEL_2 (PWR_CR2_PVDT_1) /*!< same PVD threshold level 2 on rising & falling */
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#define PWR_PVDLEVEL_3 (PWR_CR2_PVDT_0 | PWR_CR2_PVDT_1) /*!< same PVD threshold level 3 on rising & falling */
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#define PWR_PVDLEVEL_4 (PWR_CR2_PVDT_2) /*!< same PVD threshold level 4 on rising & falling */
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#define PWR_PVDLEVEL_5 (PWR_CR2_PVDT_2 | PWR_CR2_PVDT_0) /*!< same PVD threshold level 5 on rising & falling */
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#define PWR_PVDLEVEL_6 (PWR_CR2_PVDT_2 | PWR_CR2_PVDT_1) /*!< same PVD threshold level 6 on rising & falling */
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#define PWR_PVDLEVEL_7 (PWR_CR2_PVDT_2 | PWR_CR2_PVDT_1 | PWR_CR2_PVDT_0) /*!< same PVD threshold level 7 on rising & falling */
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/**
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* @}
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*/
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/** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode
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* @{
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*/
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#define PWR_PVD_MODE_NORMAL (0x00000000u) /*!< basic mode is used */
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#define PWR_PVD_MODE_IT_RISING (0x00010001u) /*!< External Interrupt Mode with Rising edge trigger detection */
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#define PWR_PVD_MODE_IT_FALLING (0x00010002u) /*!< External Interrupt Mode with Falling edge trigger detection */
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#define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003u) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
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#define PWR_PVD_MODE_EVENT_RISING (0x00020001u) /*!< Event Mode with Rising edge trigger detection */
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#define PWR_PVD_MODE_EVENT_FALLING (0x00020002u) /*!< Event Mode with Falling edge trigger detection */
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#define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003u) /*!< Event Mode with Rising/Falling edge trigger detection */
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/**
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* @}
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*/
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/** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line
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* @{
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*/
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#define PWR_EXTI_LINE_PVD (EXTI_IMR_IM16) /*!< External interrupt line 16 connected to PVD */
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/**
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* @}
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*/
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/** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line
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* @{
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*/
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#define PWR_EVENT_LINE_PVD (EXTI_EMR_EM16) /*!< Event line 16 connected to PVD */
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/**
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* @}
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*/
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#endif
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/** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode
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* @{
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*/
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#define PWR_MAINREGULATOR_ON (0x00000000u) /*!< Regulator in main mode */
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#define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */
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/**
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* @}
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*/
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/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
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* @{
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*/
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#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01u) /*!< Wait For Interruption instruction to enter Sleep mode */
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#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02u) /*!< Wait For Event instruction to enter Sleep mode */
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/**
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* @}
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*/
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/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
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* @{
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*/
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#define PWR_STOPENTRY_WFI ((uint8_t)0x01u) /*!< Wait For Interruption instruction to enter Stop mode */
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#define PWR_STOPENTRY_WFE ((uint8_t)0x02u) /*!< Wait For Event instruction to enter Stop mode */
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/**
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* @}
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*/
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/** @defgroup PWR_Flag PWR Status Flags
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* @{
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*/
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#if defined(PWR_PVD_SUPPORT)
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#define PWR_FLAG_PVDO (PWR_SR_PVDO) /*!< Power Voltage Detector output */
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#endif
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/**
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* @}
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*/
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/** @defgroup PWR_STOP_LPR_Voltage PWR STOP mode LPR Voltage Selection.
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* @{
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*/
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#define PWR_STOPMOD_LPR_VOLT_SCALE1 0x0 /*!< After entering stop mode, VDD=1.2V */
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#define PWR_STOPMOD_LPR_VOLT_SCALE2 PWR_CR1_VOS /*!< After entering stop mode, VDD=1.0V */
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/**
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* @}
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*/
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/** @defgroup PWR_STOP_WakeUp_Regulator_Switch_Delay PWR Stop mode WakeUp Voltage regulators switches from LPR to MR Delay.
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* @{
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*/
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#define PWR_WAKEUP_LPR_TO_MR_DELAY_2US 0x00000000U /* Wake up from the STOP mode, LP to VR ready time 2us */
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#define PWR_WAKEUP_LPR_TO_MR_DELAY_3US ( PWR_CR1_MRRDY_TIME_0) /* Wake up from the STOP mode, LP to VR ready time 2us */
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#define PWR_WAKEUP_LPR_TO_MR_DELAY_4US (PWR_CR1_MRRDY_TIME_1 ) /* Wake up from the STOP mode, LP to VR ready time 2us */
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#define PWR_WAKEUP_LPR_TO_MR_DELAY_5US (PWR_CR1_MRRDY_TIME_1 | PWR_CR1_MRRDY_TIME_0) /* Wake up from the STOP mode, LP to VR ready time 2us */
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/**
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* @}
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*/
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/** @defgroup PWR_STOP_WakeUp_HSIEN_Timing PWR STOP mode WakeUp HSI Enable Timing.
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* @{
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*/
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#define PWR_WAKEUP_HSIEN_AFTER_MR 0x00000000U /* Wake up from the STOP mode, After the MR becomes stable, enable HSI */
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#define PWR_WAKEUP_HSIEN_IMMEDIATE PWR_CR1_HSION_CTRL /* Wake up from the STOP mode, Enable HSI immediately */
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/**
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* @}
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*/
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/** @defgroup PWR_STOP_mode_Sram_Retention_Voltage PWR STOP mode Sram Retention Voltage.
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* @{
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*/
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#define PWR_SRAM_RETENTION_VOLT_0p9 ( PWR_CR1_SRAM_RETV_1 | PWR_CR1_SRAM_RETV_0) /* Set SRAM to 0.9V voltage in stop mode */
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#define PWR_SRAM_RETENTION_VOLT_VOS (PWR_CR1_SRAM_RETV_2 ) /* Set SRAM voltage as set by bit VOS in stop mode */
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/**
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* @}
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*/
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/** @defgroup PWR_STOP_WakeUp_Flash_Dealy PWR STOP WakeUp Flash Dealy.
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* @{
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*/
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#define PWR_WAKEUP_FLASH_DELAY_0US (PWR_CR1_FLS_SLPTIME_1 | PWR_CR1_FLS_SLPTIME_0) /* Wake up from the STOP mode, Enable falsh immediately*/
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#define PWR_WAKEUP_FLASH_DELAY_2US ( PWR_CR1_FLS_SLPTIME_0) /* Wake up from the STOP mode, Delay 2us enable falsh*/
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#define PWR_WAKEUP_FLASH_DELAY_3US (PWR_CR1_FLS_SLPTIME_1 ) /* Wake up from the STOP mode, Delay 3us enable falsh*/
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#define PWR_WAKEUP_FLASH_DELAY_5US 0x00000000U /* Wake up from the STOP mode, Delay 5us enable falsh*/
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/**
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* @}
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*/
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/** @defgroup PWR_MR_BiasCurrent_Source PWR MainRegulator BiasCurrent Source.
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* @{
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*/
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#define PWR_BIAS_CURRENTS_FROM_FACTORY_BYTES 0x00000000U /* MR bias currents source load from Factory config bytes */
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#define PWR_BIAS_CURRENTS_FROM_BIAS_CR (PWR_CR1_BIAS_CR_SEL) /* MR bias currents source load from BIAS_CR */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#if defined(PWR_PVD_SUPPORT)
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup PWR_Exported_Macros PWR Exported Macros
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* @{
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*/
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/** @brief Check whether or not a specific PWR flag is set.
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* @param __FLAG__ specifies the flag to check.
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* This parameter can be one a combination of following values:
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* @arg PWR_FLAG_PVDO: Power Voltage Detector Output. Indicates whether
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* VDD voltage is below or above the selected PVD threshold.
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* @retval The new state of __FLAG__ (TRUE or FALSE).
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*/
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#define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->SR & (__FLAG__)) == (__FLAG__))
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/**
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* @brief Enable the PVD Extended Interrupt Line.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
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/**
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* @brief Disable the PVD Extended Interrupt Line.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
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/**
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* @brief Enable the PVD Event Line.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EVENT_LINE_PVD)
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/**
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* @brief Disable the PVD Event Line.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EVENT_LINE_PVD)
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/**
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* @brief Enable the PVD Extended Interrupt Rising Trigger.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
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/**
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* @brief Disable the PVD Extended Interrupt Rising Trigger.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
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/**
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* @brief Enable the PVD Extended Interrupt Falling Trigger.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
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/**
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* @brief Disable the PVD Extended Interrupt Falling Trigger.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
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/**
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* @brief Enable the PVD Extended Interrupt Rising & Falling Trigger.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
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do { \
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__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
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__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
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} while(0U)
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/**
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* @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
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do { \
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__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
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__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
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} while(0U)
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/**
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* @brief Generate a Software interrupt on selected EXTI line.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
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/**
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* @brief Check whether or not the PVD EXTI interrupt flag is set.
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* @retval EXTI PVD Line Status.
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*/
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#define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & PWR_EXTI_LINE_PVD)
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/**
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* @brief Clear the PVD EXTI interrupt flag.
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* @retval None
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*/
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#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, PWR_EXTI_LINE_PVD)
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/**
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* @}
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*/
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#endif /* PWR_PVD_SUPPORT */
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/* Private constants-------------------------------------------------------*/
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/** @defgroup PWREx_WUP_Polarity Shift to apply to retrieve polarity information from PWR_WAKEUP_PINy_xxx constants
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* @{
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*/
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#define PWR_WUP_POLARITY_SHIFT 0x08u /*!< Internal constant used to retrieve wakeup pin polariry */
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/**
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* @}
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*/
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/* Private macros --------------------------------------------------------*/
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/** @defgroup PWR_Private_Macros PWR Private Macros
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* @{
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*/
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#if defined(PWR_PVD_SUPPORT)
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#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) & ~(PWR_CR2_PVDT)) == 0x00000000u)
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#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) || \
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((MODE) == PWR_PVD_MODE_IT_RISING) || \
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((MODE) == PWR_PVD_MODE_IT_FALLING) || \
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((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || \
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((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
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((MODE) == PWR_PVD_MODE_EVENT_FALLING) || \
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((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING))
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#endif
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#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
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((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
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#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || \
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((ENTRY) == PWR_SLEEPENTRY_WFE))
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#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || \
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((ENTRY) == PWR_STOPENTRY_WFE))
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#define IS_PWR_STOP_LPR_VOLT(VOLT) (((VOLT) == PWR_STOPMOD_LPR_VOLT_SCALE1) || \
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((VOLT) == PWR_STOPMOD_LPR_VOLT_SCALE2))
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#define IS_PWR_REGULATOR_SWTICH_DELAY(DELAY) (((DELAY) == PWR_WAKEUP_LPR_TO_MR_DELAY_2US) || \
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((DELAY) == PWR_WAKEUP_LPR_TO_MR_DELAY_3US) || \
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((DELAY) == PWR_WAKEUP_LPR_TO_MR_DELAY_4US) || \
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((DELAY) == PWR_WAKEUP_LPR_TO_MR_DELAY_5US))
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#define IS_PWR_WAKEUP_HSIEN_TIMING(TIMING) (((TIMING) == PWR_WAKEUP_HSIEN_AFTER_MR) || \
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((TIMING) == PWR_WAKEUP_HSIEN_IMMEDIATE))
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#define IS_PWR_SRAM_RETENTION_VOLT(VOLT) (((VOLT) == PWR_SRAM_RETENTION_VOLT_0p9) || \
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((VOLT) == PWR_SRAM_RETENTION_VOLT_VOS))
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#define IS_PWR_WAKEUP_FLASH_DELAY(DELAY) (((DELAY) == PWR_WAKEUP_FLASH_DELAY_0US) || \
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((DELAY) == PWR_WAKEUP_FLASH_DELAY_2US) || \
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((DELAY) == PWR_WAKEUP_FLASH_DELAY_3US) || \
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((DELAY) == PWR_WAKEUP_FLASH_DELAY_5US))
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#define IS_BIAS_CURRENTS_SOURCE(SOURCE) (((SOURCE) == PWR_BIAS_CURRENTS_FROM_FACTORY_BYTES) || \
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((SOURCE) == PWR_BIAS_CURRENTS_FROM_BIAS_CR))
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/**
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* @}
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*/
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/* Include PWR HAL Extended module */
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup PWR_Exported_Functions PWR Exported Functions
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* @{
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*/
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/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
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* @{
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*/
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/* Initialization and de-initialization functions *******************************/
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void HAL_PWR_DeInit(void);
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/**
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* @}
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*/
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/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
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* @{
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*/
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/* Peripheral Control functions ************************************************/
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void HAL_PWR_EnableBkUpAccess(void);
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void HAL_PWR_DisableBkUpAccess(void);
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#if defined(PWR_PVD_SUPPORT)
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HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
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void HAL_PWR_EnablePVD(void);
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void HAL_PWR_DisablePVD(void);
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#endif
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HAL_StatusTypeDef HAL_PWR_ConfigStopMode(PWR_StopModeConfigTypeDef *sStopModeConfig);
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HAL_StatusTypeDef HAL_PWR_ConfigBIAS(PWR_BIASConfigTypeDef *sBIASConfig);
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|
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/* Low Power modes configuration functions ************************************/
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void HAL_PWR_EnterSLEEPMode(uint8_t SLEEPEntry);
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void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
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void HAL_PWR_EnableSleepOnExit(void);
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void HAL_PWR_DisableSleepOnExit(void);
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void HAL_PWR_EnableSEVOnPend(void);
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void HAL_PWR_DisableSEVOnPend(void);
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#if defined(PWR_PVD_SUPPORT)
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void HAL_PWR_PVD_IRQHandler(void);
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void HAL_PWR_PVD_Callback(void);
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|
#endif
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/**
|
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* @}
|
|
*/
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|
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/**
|
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* @}
|
|
*/
|
|
|
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/**
|
|
* @}
|
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*/
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|
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/**
|
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* @}
|
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*/
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#ifdef __cplusplus
|
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}
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#endif
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#endif /* __PY32F0xx_HAL_PWR_H */
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/************************ (C) COPYRIGHT Puya *****END OF FILE****/
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