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571 lines
16 KiB
571 lines
16 KiB
/**
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******************************************************************************
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* @file py32f0xx_ll_rcc.c
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* @author MCU Application Team
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* @brief RCC LL module driver.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by Puya under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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#if defined(USE_FULL_LL_DRIVER)
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/* Includes ------------------------------------------------------------------*/
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#include "py32f0xx_ll_rcc.h"
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#ifdef USE_FULL_ASSERT
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#include "py32_assert.h"
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#else
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#define assert_param(expr) ((void)0U)
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#endif
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/** @addtogroup PY32F0xx_LL_Driver
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* @{
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*/
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#if defined(RCC)
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/** @addtogroup RCC_LL
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup RCC_LL_Private_Macros
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* @{
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*/
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#define IS_LL_RCC_MCO_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_MCO1_CLKSOURCE))
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#if (defined(RCC_CCIPR_COMP1SEL) && defined(RCC_CCIPR_COMP2SEL))
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#define IS_LL_RCC_COMP_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_COMP1_CLKSOURCE) \
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|| ((__VALUE__) == LL_RCC_COMP2_CLKSOURCE))
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#endif
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#if defined(RCC_CCIPR_LPTIMSEL)
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#define IS_LL_RCC_LPTIM_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_LPTIM1_CLKSOURCE))
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#endif /* LPTIM1 */
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/**
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* @}
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*/
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/* Private function prototypes -----------------------------------------------*/
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/** @defgroup RCC_LL_Private_Functions RCC Private functions
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* @{
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*/
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uint32_t RCC_GetSystemClockFreq(void);
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uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
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uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
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#if defined(RCC_PLL_SUPPORT)
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uint32_t RCC_PLL_GetFreqDomain_SYS(void);
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#endif
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup RCC_LL_Exported_Functions
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* @{
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*/
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/** @addtogroup RCC_LL_EF_Init
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* @{
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*/
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/**
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* @brief Reset the RCC clock configuration to the default reset state.
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* @note The default reset state of the clock configuration is given below:
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* - HSI ON and used as system clock source
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* - HSE and PLL OFF
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* - AHB and APB1 prescaler set to 1.
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* - CSS, MCO OFF
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* - All interrupts disabled
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* @note This function does not modify the configuration of the
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* - Peripheral clocks
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* - LSI, LSE and RTC clocks
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: RCC registers are de-initialized
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* - ERROR: not applicable
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*/
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ErrorStatus LL_RCC_DeInit(void)
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{
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/* Set HSION bit and wait for HSI READY bit */
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LL_RCC_HSI_Enable();
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while (LL_RCC_HSI_IsReady() != 1U)
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{}
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/* Set HSI_FS, HSITRIM bits to default value*/
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LL_RCC_HSI_SetCalibFreq(LL_RCC_HSICALIBRATION_8MHz);
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/* Reset CFGR register */
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LL_RCC_WriteReg(CFGR, 0x00000000U);
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/* Wait till SYSCLK is HSISYS */
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while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSISYS)
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{}
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/* Reset whole CR register but HSI in 2 steps in case HSEBYP is set */
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LL_RCC_WriteReg(CR, RCC_CR_HSION);
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while (LL_RCC_HSE_IsReady() != 0U)
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{}
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LL_RCC_WriteReg(CR, RCC_CR_HSION);
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#if defined(RCC_PLL_SUPPORT)
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/* Wait for PLL READY bit to be reset */
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while (LL_RCC_PLL_IsReady() != 0U)
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{}
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/* Reset PLLCFGR register */
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LL_RCC_WriteReg(PLLCFGR, 0x00000000U);
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#endif
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/* Disable all interrupts */
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LL_RCC_WriteReg(CIER, 0x00000000U);
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/* Clear all interrupts flags */
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LL_RCC_WriteReg(CICR, 0xFFFFFFFFU);
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return SUCCESS;
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}
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/**
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* @}
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*/
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/** @addtogroup RCC_LL_EF_Get_Freq
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* @brief Return the frequencies of different on chip clocks; System, AHB and APB1 buses clocks
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* and different peripheral clocks available on the device.
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* @note If SYSCLK source is HSI, function returns values based on HSI_VALUE divided by HSI division factor(**)
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* @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
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* @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(***)
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* or HSI_VALUE(**) multiplied/divided by the PLL factors.
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* @note (**) HSI_VALUE is a constant defined in this file (default value
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* 8 MHz) but the real value may vary depending on the variations
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* in voltage and temperature.
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* @note (***) HSE_VALUE is a constant defined in this file (default value
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* 8 MHz), user has to ensure that HSE_VALUE is same as the real
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* frequency of the crystal used. Otherwise, this function may
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* have wrong result.
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* @note The result of this function could be incorrect when using fractional
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* value for HSE crystal.
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* @note This function can be used by the user application to compute the
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* baud-rate for the communication peripherals or configure other parameters.
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* @{
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*/
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/**
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* @brief Return the frequencies of different on chip clocks; System, AHB and APB1 buses clocks
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* @note Each time SYSCLK, HCLK and/or PCLK1 clock changes, this function
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* must be called to update structure fields. Otherwise, any
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* configuration based on this function will be incorrect.
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* @param RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies
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* @retval None
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*/
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void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
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{
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/* Get SYSCLK frequency */
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RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
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/* HCLK clock frequency */
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RCC_Clocks->HCLK_Frequency = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
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/* PCLK1 clock frequency */
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RCC_Clocks->PCLK1_Frequency = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
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}
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/**
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* @brief Return MCO clock frequency
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* @param MCOx This parameter can be one of the following values:
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* @arg @ref LL_RCC_MCO1_CLKSOURCE
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* @retval MCO clock frequency (in Hz)
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* - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSE, LSI or LSE) is not ready
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* - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
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*/
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uint32_t LL_RCC_GetMCOClockFreq(uint32_t MCOx)
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{
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uint32_t mco_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
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/* Check parameter */
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assert_param(IS_LL_RCC_MCO_CLKSOURCE(MCOx));
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switch (LL_RCC_GetMCOClockSource(MCOx))
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{
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case LL_RCC_MCO1SOURCE_SYSCLK: /* MCO Clock is SYSCLK */
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mco_frequency = SystemCoreClock;
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break;
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case LL_RCC_MCO1SOURCE_HSI: /* MCO Clock is HSI */
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mco_frequency = LL_RCC_HSI_GetFreq();
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break;
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case LL_RCC_MCO1SOURCE_HSE: /* MCO Clock is HSE */
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if (LL_RCC_HSE_IsReady() == 1U)
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{
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mco_frequency = HSE_VALUE;
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}
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break;
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#if defined(RCC_PLL_SUPPORT)
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case LL_RCC_MCO1SOURCE_PLLCLK: /* MCO Clock is PLLCLK */
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mco_frequency = RCC_PLL_GetFreqDomain_SYS();
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break;
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#endif
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case LL_RCC_MCO1SOURCE_LSI: /* MCO Clock is LSI */
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if (LL_RCC_LSI_IsReady() == 1U)
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{
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mco_frequency = LSI_VALUE;
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}
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break;
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#if defined(RCC_LSE_SUPPORT)
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case LL_RCC_MCO1SOURCE_LSE: /* MCO Clock is LSE */
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if (LL_RCC_LSE_IsReady() == 1U)
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{
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mco_frequency = LSE_VALUE;
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}
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break;
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#endif
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case LL_RCC_MCO1SOURCE_NOCLOCK: /* No clock used as MCO clock source */
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default:
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mco_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
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return mco_frequency;
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}
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mco_frequency = mco_frequency / (1U << (LL_RCC_GetMCODiv(MCOx) >> RCC_CFGR_MCOPRE_Pos));
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return mco_frequency;
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}
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/**
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* @brief Return LSC clock frequency
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* @retval LSC clock frequency (in Hz)
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* - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (LSI or LSE) is not ready
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*/
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uint32_t LL_RCC_GetLSCClockFreq(void)
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{
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#if defined(RCC_LSE_SUPPORT)
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uint32_t lsc_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
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switch (LL_RCC_LSCO_GetSource())
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{
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case LL_RCC_LSCO_CLKSOURCE_LSE: /* LSC Clock is LSE Osc. */
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if (LL_RCC_LSE_IsReady() == 1U)
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{
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lsc_frequency = LSE_VALUE;
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}
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break;
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case LL_RCC_LSCO_CLKSOURCE_LSI: /* LSC Clock is LSI Osc. */
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default:
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if (LL_RCC_LSI_IsReady() == 1U)
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{
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lsc_frequency = LSI_VALUE;
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}
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break;
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}
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return lsc_frequency;
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#else
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return LSI_VALUE;
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#endif
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}
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#if defined(RCC_CCIPR_PVDSEL)
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/**
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* @brief Return PVD clock frequency
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* @retval PVD clock frequency (in Hz)
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* - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (PCLK1, LSI or LSE) is not ready
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*/
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uint32_t LL_RCC_GetPVDClockFreq(void)
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{
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uint32_t pvd_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
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/* PVDCLK clock frequency */
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switch (LL_RCC_GetPVDClockSource())
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{
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case LL_RCC_PVD_CLKSOURCE_LSC: /* PVD Clock is LSC */
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pvd_frequency = LL_RCC_GetLSCClockFreq();
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break;
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case LL_RCC_PVD_CLKSOURCE_PCLK1: /* PVD Clock is PCLK1 */
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default:
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pvd_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
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break;
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}
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return pvd_frequency;
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}
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#endif
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#if defined(COMP1)
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/**
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* @brief Return COMP clock frequency
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* @param COMPx This parameter can be one of the following values:
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* @arg @ref LL_RCC_COMP1_CLKSOURCE
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* @arg @ref LL_RCC_COMP2_CLKSOURCE
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* @retval COMP clock frequency (in Hz)
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* - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (PCLK1, LSI or LSE) is not ready
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*/
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uint32_t LL_RCC_GetCOMPClockFreq(uint32_t COMPx)
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{
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uint32_t comp_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
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/* Check parameter */
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assert_param(IS_LL_RCC_COMP_CLKSOURCE(COMPx));
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if (COMPx == LL_RCC_COMP1_CLKSOURCE)
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{
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/* COMP1CLK clock frequency */
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switch (LL_RCC_GetCOMPClockSource(COMPx))
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{
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case LL_RCC_COMP1_CLKSOURCE_LSC: /* COMP1 Clock is LSC */
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comp_frequency = LL_RCC_GetLSCClockFreq();
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break;
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case LL_RCC_COMP1_CLKSOURCE_PCLK1: /* COMP1 Clock is PCLK1 */
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default:
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comp_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
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break;
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}
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}
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#if defined(COMP2)
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else
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{
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/* COMP2CLK clock frequency */
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switch (LL_RCC_GetCOMPClockSource(COMPx))
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{
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case LL_RCC_COMP2_CLKSOURCE_LSC: /* COMP2 Clock is LSC */
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comp_frequency = LL_RCC_GetLSCClockFreq();
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break;
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case LL_RCC_COMP2_CLKSOURCE_PCLK1: /* COMP2 Clock is PCLK1 */
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default:
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comp_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
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break;
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}
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}
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#endif
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return comp_frequency;
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}
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#endif
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/**
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* @brief Return LPTIMx clock frequency
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* @param LPTIMx This parameter can be one of the following values:
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* @arg @ref LL_RCC_LPTIM1_CLKSOURCE
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* @retval LPTIM clock frequency (in Hz)
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* - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (PCLK1, LSI or LSE) is not ready
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* - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
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*/
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uint32_t LL_RCC_GetLPTIMClockFreq(uint32_t LPTIMx)
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{
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uint32_t lptim_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
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/* Check parameter */
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assert_param(IS_LL_RCC_LPTIM_CLKSOURCE(LPTIMx));
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if (LPTIMx == LL_RCC_LPTIM1_CLKSOURCE)
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{
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/* LPTIM1CLK clock frequency */
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switch (LL_RCC_GetLPTIMClockSource(LPTIMx))
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{
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case LL_RCC_LPTIM1_CLKSOURCE_LSI: /* LPTIM1 Clock is LSI Osc. */
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if (LL_RCC_LSI_IsReady() == 1U)
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{
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lptim_frequency = LSI_VALUE;
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}
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break;
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case LL_RCC_LPTIM1_CLKSOURCE_NONE: /* No clock used as LPTIM1 clock source */
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lptim_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
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break;
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#if defined(RCC_LSE_SUPPORT)
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case LL_RCC_LPTIM1_CLKSOURCE_LSE: /* LPTIM1 Clock is LSE Osc. */
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if (LL_RCC_LSE_IsReady() == 1U)
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{
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lptim_frequency = LSE_VALUE;
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}
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break;
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#endif
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case LL_RCC_LPTIM1_CLKSOURCE_PCLK1: /* LPTIM1 Clock is PCLK1 */
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default:
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lptim_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
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break;
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}
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}
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return lptim_frequency;
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}
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#if defined(RCC_BDCR_RTCSEL)
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/**
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* @brief Return RTC clock frequency
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* @retval RTC clock frequency (in Hz)
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* - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillators (LSI, LSE or HSE) are not ready
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* - @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
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*/
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uint32_t LL_RCC_GetRTCClockFreq(void)
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{
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uint32_t rtc_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
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/* RTCCLK clock frequency */
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switch (LL_RCC_GetRTCClockSource())
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{
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#if defined(RCC_LSE_SUPPORT)
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case LL_RCC_RTC_CLKSOURCE_LSE: /* LSE clock used as RTC clock source */
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if (LL_RCC_LSE_IsReady() == 1U)
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{
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rtc_frequency = LSE_VALUE;
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}
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break;
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#endif
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case LL_RCC_RTC_CLKSOURCE_LSI: /* LSI clock used as RTC clock source */
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if (LL_RCC_LSI_IsReady() == 1U)
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{
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rtc_frequency = LSI_VALUE;
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}
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break;
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case LL_RCC_RTC_CLKSOURCE_HSE_DIV128: /* HSE/128 clock used as RTC clock source */
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if (LL_RCC_HSE_IsReady() == 1U)
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{
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rtc_frequency = HSE_VALUE / 128U;
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}
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break;
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case LL_RCC_RTC_CLKSOURCE_NONE: /* No clock used as RTC clock source */
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default:
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rtc_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
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break;
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}
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return rtc_frequency;
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}
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#endif
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @addtogroup RCC_LL_Private_Functions
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* @{
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*/
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/**
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* @brief Return SYSTEM clock frequency
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* @retval SYSTEM clock frequency (in Hz)
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*/
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uint32_t RCC_GetSystemClockFreq(void)
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{
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uint32_t frequency;
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/* Get SYSCLK source -------------------------------------------------------*/
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switch (LL_RCC_GetSysClkSource())
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{
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case LL_RCC_SYS_CLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
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frequency = HSE_VALUE;
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break;
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#if defined(RCC_PLL_SUPPORT)
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case LL_RCC_SYS_CLKSOURCE_STATUS_PLL: /* PLL used as system clock source */
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frequency = RCC_PLL_GetFreqDomain_SYS();
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break;
|
|
#endif
|
|
case LL_RCC_SYS_CLKSOURCE_STATUS_LSI: /* LSI used as system clock source */
|
|
frequency = LSI_VALUE;
|
|
break;
|
|
#if defined(RCC_LSE_SUPPORT)
|
|
case LL_RCC_SYS_CLKSOURCE_STATUS_LSE: /* LSE used as system clock source */
|
|
frequency = LSE_VALUE;
|
|
break;
|
|
#endif
|
|
case LL_RCC_SYS_CLKSOURCE_STATUS_HSISYS: /* HSISYS used as system clock source */
|
|
default:
|
|
frequency = __LL_RCC_CALC_HSI_FREQ(LL_RCC_GetHSIDiv());
|
|
break;
|
|
}
|
|
|
|
return frequency;
|
|
}
|
|
|
|
/**
|
|
* @brief Return HCLK clock frequency
|
|
* @param SYSCLK_Frequency SYSCLK clock frequency
|
|
* @retval HCLK clock frequency (in Hz)
|
|
*/
|
|
uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
|
|
{
|
|
/* HCLK clock frequency */
|
|
return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
|
|
}
|
|
|
|
/**
|
|
* @brief Return PCLK1 clock frequency
|
|
* @param HCLK_Frequency HCLK clock frequency
|
|
* @retval PCLK1 clock frequency (in Hz)
|
|
*/
|
|
uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
|
|
{
|
|
/* PCLK1 clock frequency */
|
|
return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
|
|
}
|
|
#if defined(RCC_PLL_SUPPORT)
|
|
/**
|
|
* @brief Return PLL clock frequency used for system domain
|
|
* @retval PLL clock frequency (in Hz)
|
|
*/
|
|
uint32_t RCC_PLL_GetFreqDomain_SYS(void)
|
|
{
|
|
uint32_t pllinputfreq;
|
|
uint32_t pllsource;
|
|
|
|
pllsource = LL_RCC_PLL_GetMainSource();
|
|
|
|
switch (pllsource)
|
|
{
|
|
case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
|
|
pllinputfreq = HSE_VALUE;
|
|
break;
|
|
|
|
case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
|
|
default:
|
|
pllinputfreq = LL_RCC_HSI_GetFreq();
|
|
break;
|
|
}
|
|
return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq);
|
|
}
|
|
#endif
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* defined(RCC) */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* USE_FULL_LL_DRIVER */
|
|
|
|
/************************ (C) COPYRIGHT Puya*****END OF FILE****/
|